<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/ics/NakamuraBWININY93" mdate="2002-12-17">
<author>Hiroshi Nakamura</author>
<author>Taisuke Boku</author>
<author>Hideo Wada</author>
<author>Hiromitsu Imori</author>
<author>Ikuo Nakata</author>
<author>Yasuhiro Inagami</author>
<author>Kisaburo Nakazawa</author>
<author>Yoshiyuki Yamashita</author>
<title>A Scalar Architecture for Pseudo Vector Processing Based on Slide-Windowed Registers.</title>
<pages>298-307</pages>
<year>1993</year>
<booktitle>International Conference on Supercomputing</booktitle>
<ee>http://doi.acm.org/10.1145/165939.165998</ee>
<url>db/conf/ics/ics1993.html#NakamuraBWININY93</url>
</inproceedings>
</dblp>
