<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/ics/HwangDPRSUMNLHLMC90" mdate="2005-06-01">
<author>Kai Hwang</author>
<author>Michel Dubois</author>
<author>Dhabaleswar K. Panda</author>
<author>S. Rao</author>
<author>Shisheng Shang</author>
<author>Aydin &#220;resin</author>
<author>W. Mao</author>
<author>H. Nair</author>
<author>M. Lytwyn</author>
<author>F. Hsieh</author>
<author>J. Liu</author>
<author>Sharad Mehrotra</author>
<author>Chien-Ming Cheng</author>
<title>OMP: a RISC-based multiprocessor using orthogonal-access memories and multiple spanning buses.</title>
<pages>7-22</pages>
<year>1990</year>
<booktitle>ICS</booktitle>
<ee>http://doi.acm.org/10.1145/77726.255133</ee>
<url>db/conf/ics/ics1990.html#HwangDPRSUMNLHLMC90</url>
</inproceedings>
</dblp>
