<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/ices/KajitaniHNYNYIKIKH98" mdate="2002-01-03">
<author>Isamu Kajitani</author>
<author>Tsutomu Hoshino</author>
<author>Daisuke Nishikawa</author>
<author>Hiroshi Yokoi</author>
<author>Shougo Nakaya</author>
<author>Tsukasa Yamauchi</author>
<author>Takeshi Inuo</author>
<author>Nobuki Kajihara</author>
<author>Masaya Iwata</author>
<author>Didier Keymeulen</author>
<author>Tetsuya Higuchi</author>
<title>A Gate-Level EHW Chip: Implementing GA Operations and Reconfigurable Hardware on a Single LSI.</title>
<pages>1-12</pages>
<ee>http://link.springer.de/link/service/series/0558/bibs/1478/14780001.htm</ee>
<year>1998</year>
<crossref>conf/ices/1998</crossref>
<booktitle>ICES</booktitle>
<url>db/conf/ices/ices1998.html#KajitaniHNYNYIKIKH98</url>
</inproceedings>
</dblp>
