BibTeX record conf/icecsys/IsmailogluA08

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@inproceedings{DBLP:conf/icecsys/IsmailogluA08,
  author       = {Ayse Neslin Ismailoglu and
                  Murat Askar},
  title        = {Delay insensitivity verification of bit-level pipelined systolic arrays
                  in dual-rail treshold logic},
  booktitle    = {15th {IEEE} International Conference on Electronics, Circuits and
                  Systems, {ICECS} 2008, St. Julien's, Malta, August 31 2008-September
                  3, 2008},
  pages        = {1063--1066},
  publisher    = {{IEEE}},
  year         = {2008},
  url          = {https://doi.org/10.1109/ICECS.2008.4675040},
  doi          = {10.1109/ICECS.2008.4675040},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/icecsys/IsmailogluA08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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