A 8.8-ns 54 54-Bit Multiplier Using New Redundant Binary Architecture.

Hiroshi Makino Yasunobu Nakase Hirofumi Shinohara A 8.8-ns 54 54-Bit Multiplier Using New Redundant Binary Architecture. 202-205 1993 ICCD db/conf/iccd/iccd1993.html#MakinoNS93