@inproceedings{DBLP:conf/iccd/ChandraIJMNR94,
author = {Ashok K. Chandra and
Vijay S. Iyengar and
R. V. Jawalekar and
Michael P. Mullen and
Indira Nair and
Barry K. Rosen},
title = {Architectural Verification of Processors Using Symbolic
Instruction Graphs},
booktitle = {ICCD},
year = {1994},
pages = {454-459},
crossref = {DBLP:conf/iccd/1994},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/iccd/1994,
title = {Proceedings 1994 IEEE International Conference on Computer
Design: VLSI in Computer {\&} Processors, ICCD '94, Cambridge,
MA, USA, October 10-12, 1994},
publisher = {IEEE Computer Society},
year = {1994},
isbn = {0-8186-6565-3},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Last update 2009-06-10 CET by the DBLP Team —
Data released under the ODC-BY 1.0 license — See also our legal information page