Verification of Real Time Controllers Against Timing Diagram Specifications Using Constraint Logic Programming.

Eduard Cerny Fen Jin Verification of Real Time Controllers Against Timing Diagram Specifications Using Constraint Logic Programming. 32-39 1999 ICCD http://csdl.computer.org/comp/proceedings/iccd/1999/0406/00/04060032abs.htm db/conf/iccd/iccd1999.html#CernyJ99