Value assignment of adjustable delay buffers for clock skew minimization in multi-voltage mode designs.

Yu-Shih Su Wing-Kai Hon Cheng-Chih Yang Shih-Chieh Chang Yeong-Jar Chang Value assignment of adjustable delay buffers for clock skew minimization in multi-voltage mode designs. 535-538 2009 ICCAD http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5361241 conf/iccad/2009 db/conf/iccad/iccad2009.html#SuHYCC09