Retiming with non-zero clock skew, variable register, and interconnect delay.

Tolga Soyata Eby G. Friedman Retiming with non-zero clock skew, variable register, and interconnect delay. 234-241 1994 conf/iccad/1994 ICCAD http://doi.acm.org/10.1145/191326.191417 db/conf/iccad/iccad1994.html#SoyataF94