A succinct memory model for automated design debugging.

Brian Keng Hratch Mangassarian Andreas G. Veneris A succinct memory model for automated design debugging. 137-142 2008 ICCAD http://doi.acm.org/10.1145/1509456.1509496 conf/iccad/2008 db/conf/iccad/iccad2008.html#KengMV08