A methodology for robust, energy efficient design of Spin-Torque-Transfer RAM arrays at scaled technologies.

Subho Chatterjee Mitchelle Rasquinha Sudhakar Yalamanchili Saibal Mukhopadhyay A methodology for robust, energy efficient design of Spin-Torque-Transfer RAM arrays at scaled technologies. 474-477 2009 ICCAD http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5361252 conf/iccad/2009 db/conf/iccad/iccad2009.html#ChatterjeeRYM09