<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/iastedCCS/LinYZSX05" mdate="2007-01-25">
<author>Zengjin Lin</author>
<author>Haigang Yang</author>
<author>Lungui Zhong</author>
<author>Jiabin Sun</author>
<author>Shanhong Xia</author>
<title>Impact of capacitor array mismatch in embedded CMOS CR SAR ADC design.</title>
<pages>165-168</pages>
<year>2005</year>
<crossref>conf/iastedCCS/2005</crossref>
<booktitle>Circuits, Signals, and Systems</booktitle>
<url>db/conf/iastedCCS/iastedCCS2005.html#LinYZSX05</url>
</inproceedings>
</dblp>
