Scalar Operand Networks: On-Chip Interconnect for ILP in Partitioned Architecture.

Michael Bedford Taylor Walter Lee Saman P. Amarasinghe Anant Agarwal Scalar Operand Networks: On-Chip Interconnect for ILP in Partitioned Architecture. 341-353 2003 HPCA http://computer.org/proceedings/hpca/1871/18710341abs.htm db/conf/hpca/hpca2003.html#TaylorLAA03