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BibTeX record conf/hpca/SharkeyP06
@inproceedings{DBLP:conf/hpca/SharkeyP06, author = {Joseph J. Sharkey and Dmitry V. Ponomarev}, title = {Efficient instruction schedulers for {SMT} processors}, booktitle = {12th International Symposium on High-Performance Computer Architecture, {HPCA-12} 2006, Austin, Texas, USA, February 11-15, 2006}, pages = {288--298}, publisher = {{IEEE} Computer Society}, year = {2006}, url = {https://doi.org/10.1109/HPCA.2006.1598137}, doi = {10.1109/HPCA.2006.1598137}, timestamp = {Fri, 24 Mar 2023 00:02:07 +0100}, biburl = {https://dblp.org/rec/conf/hpca/SharkeyP06.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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