Wei-Fen Lin Steven K. Reinhardt Doug Burger Reducing DRAM Latencies with an Integrated Memory Hierarchy Design. 301-312 2001 conf/hpca/2001 HPCA http://doi.ieeecomputersociety.org/10.1109/HPCA.2001.903272 db/conf/hpca/hpca2001.html#LinRB01