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@inproceedings{DBLP:conf/hpca/IyengarTB96,
author = {Vijay S. Iyengar and
Louise Trevillyan and
Pradip Bose},
title = {Representative Traces for Processor Models with Infinite
Cache},
booktitle = {HPCA},
year = {1996},
pages = {62-72},
ee = {http://computer.org/proceedings/hpca/7237/72370062abs.htm},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Copyright © 2002-05-13 by Michael Ley (ley@uni-trier.de)