BibTeX record conf/hotchips/YoshikawaYA06

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@inproceedings{DBLP:conf/hotchips/YoshikawaYA06,
  author       = {Takashi Yoshikawa and
                  Yutaka Yamada and
                  Shigehiro Asano},
  title        = {An implementation of hardware accelerator using dynamically reconfigurable
                  architecture},
  booktitle    = {2006 {IEEE} Hot Chips 18 Symposium (HCS), Stanford, CA, USA, August
                  20-22, 2006},
  pages        = {1--38},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.ieeecomputersociety.org/10.1109/HOTCHIPS.2006.7477752},
  doi          = {10.1109/HOTCHIPS.2006.7477752},
  timestamp    = {Fri, 24 Mar 2023 00:00:20 +0100},
  biburl       = {https://dblp.org/rec/conf/hotchips/YoshikawaYA06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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