Simplified delay design guidelines for on-chip global interconnects.

Liang Zhang Wentai Liu Rizwan Bashirullah John Wilson Paul D. Franzon Simplified delay design guidelines for on-chip global interconnects. 29-32 2004 conf/glvlsi/2004 ACM Great Lakes Symposium on VLSI http://doi.acm.org/10.1145/988952.988960 db/conf/glvlsi/glvlsi2004.html#ZhangLBWF04