A Fast Algorithm for Locating and Correcting Simple Design Errors in VLSI Digital Circuits.

Andreas G. Veneris Ibrahim N. Hajj A Fast Algorithm for Locating and Correcting Simple Design Errors in VLSI Digital Circuits. 45-50 1997 conf/glvlsi/1997 Great Lakes Symposium on VLSI http://csdl.computer.org/comp/proceedings/glsvlsi/1997/7904/00/79040045abs.htm db/conf/glvlsi/glvlsi1997.html#VenerisH97