BibTeX record conf/glvlsi/VeeramachaneniAKS07

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@inproceedings{DBLP:conf/glvlsi/VeeramachaneniAKS07,
  author       = {Sreehari Veeramachaneni and
                  Lingamneni Avinash and
                  Kirthi M. Krishna and
                  M. B. Srinivas},
  editor       = {Hai Zhou and
                  Enrico Macii and
                  Zhiyuan Yan and
                  Yehia Massoud},
  title        = {Novel architectures for efficient (m, n) parallel counters},
  booktitle    = {Proceedings of the 17th {ACM} Great Lakes Symposium on {VLSI} 2007,
                  Stresa, Lago Maggiore, Italy, March 11-13, 2007},
  pages        = {188--191},
  publisher    = {{ACM}},
  year         = {2007},
  url          = {https://doi.org/10.1145/1228784.1228833},
  doi          = {10.1145/1228784.1228833},
  timestamp    = {Wed, 16 Aug 2023 21:16:32 +0200},
  biburl       = {https://dblp.org/rec/conf/glvlsi/VeeramachaneniAKS07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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