@inproceedings{DBLP:conf/glvlsi/RoyannezA96,
author = {Philippe Royannez and
Amara Amara},
title = {A 1.0ns 64-bits GaAs Adder using Quad tree algorithm},
booktitle = {Great Lakes Symposium on VLSI},
year = {1996},
pages = {24-28},
ee = {http://doi.ieeecomputersociety.org/10.1109/GLSV.1996.497587},
crossref = {DBLP:conf/glvlsi/1996},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/glvlsi/1996,
title = {6th Great Lakes Symposium on VLSI (GLS-VLSI '96), March
22-23, 1996, Ames, IA, USA},
booktitle = {Great Lakes Symposium on VLSI},
publisher = {IEEE Computer Society},
year = {1996},
bibsource = {DBLP, http://dblp.uni-trier.de}
}