OsmanliogluKE09'

BibTeX

@inproceedings{DBLP:conf/glvlsi/OsmanliogluKE09,
  author    = {Yusuf Osmanlioglu and
               Y. Onur Ko\c{c}berber and
               Oguz Ergin},
  title     = {Reducing parity generation latency through input value aware
               circuits},
  booktitle = {ACM Great Lakes Symposium on VLSI},
  year      = {2009},
  pages     = {109-112},
  ee        = {http://doi.acm.org/10.1145/1531542.1531570},
  crossref  = {DBLP:conf/glvlsi/2009},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}

@proceedings{DBLP:conf/glvlsi/2009,
  editor    = {Fabrizio Lombardi and
               Sanjukta Bhanja and
               Yehia Massoud and
               R. Iris Bahar},
  title     = {Proceedings of the 19th ACM Great Lakes Symposium on VLSI
               2009, Boston Area, MA, USA, May 10-12 2009},
  booktitle = {ACM Great Lakes Symposium on VLSI},
  publisher = {ACM},
  year      = {2009},
  isbn      = {978-1-60558-522-2},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}