A low-power phase change memory based hybrid cache architecture.

Prasanth Mangalagiri Karthik Sarpatwari Aditya Yanamandra Vijaykrishnan Narayanan Yuan Xie Mary Jane Irwin Osama Awadel Karim A low-power phase change memory based hybrid cache architecture. 395-398 2008 ACM Great Lakes Symposium on VLSI http://doi.acm.org/10.1145/1366110.1366204 conf/glvlsi/2008 db/conf/glvlsi/glvlsi2008.html#MangalagiriSYNXIK08