Capturing topology-level implications of link synthesis techniques for nanoscale networks-on-chip.

Daniele Ludovici Georgi Nedeltchev Gaydadjiev Davide Bertozzi Luca Benini Capturing topology-level implications of link synthesis techniques for nanoscale networks-on-chip. 125-128 2009 ACM Great Lakes Symposium on VLSI http://doi.acm.org/10.1145/1531542.1531574 conf/glvlsi/2009 db/conf/glvlsi/glvlsi2009.html#LudoviciGBB09