BibTeX
@inproceedings{DBLP:conf/glvlsi/GuoPSCTC08,
author = {Jin Guo and
Antonis Papanikolaou and
Michele Stucchi and
Kristof Croes and
Zsolt Tokei and
Francky Catthoor},
title = {A tool flow for predicting system level timing failures
due to interconnect reliability degradation},
booktitle = {ACM Great Lakes Symposium on VLSI},
year = {2008},
pages = {291-296},
ee = {http://doi.acm.org/10.1145/1366110.1366180},
crossref = {DBLP:conf/glvlsi/2008},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/glvlsi/2008,
editor = {Vijay Narayanan and
Zhiyuan Yan and
Enrico Macii and
Sanjukta Bhanja},
title = {Proceedings of the 18th ACM Great Lakes Symposium on VLSI
2008, Orlando, Florida, USA, May 4-6, 2008},
booktitle = {ACM Great Lakes Symposium on VLSI},
publisher = {ACM},
year = {2008},
isbn = {978-1-59593-999-9},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Copyright © 2008-05-13 by Michael Ley (ley@uni-trier.de)