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BibTeX record conf/glvlsi/ChengLDNW17
@inproceedings{DBLP:conf/glvlsi/ChengLDNW17, author = {Huimei Cheng and Ji Li and Jeffrey T. Draper and Shahin Nazarian and Yanzhi Wang}, editor = {Laleh Behjat and Jie Han and Miroslav N. Velev and Deming Chen}, title = {Deadline-Aware Joint Optimization of Sleep Transistor and Supply Voltage for FinFET Based Embedded Systems}, booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff, AB, Canada, May 10-12, 2017}, pages = {427--430}, publisher = {{ACM}}, year = {2017}, url = {https://doi.org/10.1145/3060403.3060424}, doi = {10.1145/3060403.3060424}, timestamp = {Tue, 06 Nov 2018 16:59:34 +0100}, biburl = {https://dblp.org/rec/conf/glvlsi/ChengLDNW17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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