A power-effective scan architecture using scan flip-flops clustering and post-generation filling.

Zhen Chen Dong Xiang Boxue Yin A power-effective scan architecture using scan flip-flops clustering and post-generation filling. 517-522 2009 ACM Great Lakes Symposium on VLSI http://doi.acm.org/10.1145/1531542.1531659 conf/glvlsi/2009 db/conf/glvlsi/glvlsi2009.html#ChenXY09