Chichyang Chen Paul Chow Design of a versatile and cost-effective hybrid floating-point/LNS arithmetic processor. 540-545 2007 conf/glvlsi/2007 ACM Great Lakes Symposium on VLSI http://doi.acm.org/10.1145/1228784.1228912 db/conf/glvlsi/glvlsi2007.html#ChenC07