BibTeX record conf/glvlsi/BazarganRS00

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@inproceedings{DBLP:conf/glvlsi/BazarganRS00,
  author       = {Kia Bazargan and
                  Abhishek Ranjan and
                  Majid Sarrafzadeh},
  editor       = {Majid Sarrafzadeh and
                  Prithviraj Banerjee and
                  Kaushik Roy},
  title        = {Fast and accurate estimation of floorplans in logic/high-level synthesis},
  booktitle    = {Proceedings of the 10th {ACM} Great Lakes Symposium on {VLSI} 2000,
                  Chicago, Illinois, USA, March 2-4, 2000},
  pages        = {95--100},
  publisher    = {{ACM}},
  year         = {2000},
  url          = {https://doi.org/10.1145/330855.330990},
  doi          = {10.1145/330855.330990},
  timestamp    = {Tue, 06 Nov 2018 16:59:34 +0100},
  biburl       = {https://dblp.org/rec/conf/glvlsi/BazarganRS00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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