Deepak Kapur Mahadevan Subramaniam Mechanizing Verification of Arithmetic Circuits: SRT Division. 103-122 http://link.springer.de/link/service/series/0558/bibs/1346/13460103.htm 1997 conf/fsttcs/1997 FSTTCS db/conf/fsttcs/fsttcs97.html#KapurS97