BibTeX
@inproceedings{DBLP:conf/fpl/YuCL08,
author = {Haile Yu and
Yuk Hei Chan and
Philip Heng Wai Leong},
title = {FPGA interconnect design using logical effort},
booktitle = {FPL},
year = {2008},
pages = {447-450},
ee = {http://dx.doi.org/10.1109/FPL.2008.4629980},
crossref = {DBLP:conf/fpl/2008},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/fpl/2008,
title = {FPL 2008, International Conference on Field Programmable
Logic and Applications, Heidelberg, Germany, 8-10 September
2008},
booktitle = {FPL},
publisher = {IEEE},
year = {2008},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Copyright © 2009-02-25 by Michael Ley (ley@uni-trier.de)