A High Performance Hardware Architecture for an SAD Reuse based Hierarchical Motion Estimation Algorithm for H.264 Video Coding.

Sinan Yalcin Hasan F. Ates Ilker Hamzaoglu A High Performance Hardware Architecture for an SAD Reuse based Hierarchical Motion Estimation Algorithm for H.264 Video Coding. 509-514 2005 conf/fpl/2005 FPL db/conf/fpl/fpl2005.html#YalcinAH05