<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/fpl/ShannonFPPSC06" mdate="2007-07-19">
<author>Lesley Shannon</author>
<author>Blair Fort</author>
<author>Samir Parikh</author>
<author>Arun Patel</author>
<author>Manuel Salda&#241;a</author>
<author>Paul Chow</author>
<title>A System Design Methodology for Reducing System Integration Time and Facilitating Modular Design Verification.</title>
<pages>1-6</pages>
<year>2006</year>
<crossref>conf/fpl/2006</crossref>
<booktitle>FPL</booktitle>
<ee>http://doi.ieeecomputersociety.org/10.1109/FPL.2006.311227</ee>
<url>db/conf/fpl/fpl2006.html#ShannonFPPSC06</url>
</inproceedings>
</dblp>
