<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/fpl/PaulssonHADB07" mdate="2008-11-17">
<author>Katarina Paulsson</author>
<author>Michael H&#252;bner</author>
<author>G&#252;nther Auer</author>
<author>Michael Dreschmann</author>
<author>J&#252;rgen Becker</author>
<title>Implementation of a Virtual Internal Configuration Access Port (JCAP) for Enabling Partial Self-Reconfiguration on Xilinx Spartan III FPGAs.</title>
<pages>351-356</pages>
<year>2007</year>
<booktitle>FPL</booktitle>
<ee>http://dx.doi.org/10.1109/FPL.2007.4380671</ee>
<crossref>conf/fpl/2007</crossref>
<url>db/conf/fpl/fpl2007.html#PaulssonHADB07</url>
</inproceedings>
</dblp>
