A Speed-Up Technique for Synchronous Circuits Realized as LUT-Based FPGAs.

Toshiaki Miyazaki Hiroshi Nakada Akihiro Tsutsui Kazuhisa Yamada Naohisa Ohta A Speed-Up Technique for Synchronous Circuits Realized as LUT-Based FPGAs. 89-98 1994 conf/fpl/1994 FPL db/conf/fpl/fpl1994.html#MiyazakiNTYO94