FPGA Implementation of a GF(2<sup>4M</sup>) Multiplier for use in Pairing Based Cryptosystems.

Maurice Keller Tim Kerins William P. Marnane FPGA Implementation of a GF(2<sup>4M</sup>) Multiplier for use in Pairing Based Cryptosystems. 594-597 2005 conf/fpl/2005 FPL db/conf/fpl/fpl2005.html#KellerKM05