<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/fpl/HuttonSLPYKBRPBLKS04" mdate="2005-06-15">
<author>Michael Hutton</author>
<author>Jay Schleicher</author>
<author>David M. Lewis</author>
<author>Bruce Pedersen</author>
<author>Richard Yuan</author>
<author>Sinan Kaptanoglu</author>
<author>Gregg Baeckler</author>
<author>Boris Ratchev</author>
<author>Ketan Padalia</author>
<author>Mark Bourgeault</author>
<author>Andy Lee</author>
<author>Henry Kim</author>
<author>Rahul Saini</author>
<title>Improving FPGA Performance and Area Using an Adaptive Logic Module.</title>
<pages>135-144</pages>
<ee>http://springerlink.metapress.com/openurl.asp?genre=article&amp;issn=0302-9743&amp;volume=3203&amp;spage=135</ee>
<year>2004</year>
<crossref>conf/fpl/2004</crossref>
<booktitle>FPL</booktitle>
<url>db/conf/fpl/fpl2004.html#HuttonSLPYKBRPBLKS04</url>
</inproceedings>
</dblp>
