BibTeX record conf/fpl/DharSIP19

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@inproceedings{DBLP:conf/fpl/DharSIP19,
  author       = {Shounak Dhar and
                  Love Singhal and
                  Mahesh A. Iyer and
                  David Z. Pan},
  editor       = {Ioannis Sourdis and
                  Christos{-}Savvas Bouganis and
                  Carlos {\'{A}}lvarez and
                  Leonel Antonio Toledo D{\'{\i}}az and
                  Pedro Valero{-}Lara and
                  Xavier Martorell},
  title        = {{FPGA} Accelerated {FPGA} Placement},
  booktitle    = {29th International Conference on Field Programmable Logic and Applications,
                  {FPL} 2019, Barcelona, Spain, September 8-12, 2019},
  pages        = {404--410},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/FPL.2019.00070},
  doi          = {10.1109/FPL.2019.00070},
  timestamp    = {Thu, 14 Oct 2021 10:11:52 +0200},
  biburl       = {https://dblp.org/rec/conf/fpl/DharSIP19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}