BibTeX
@inproceedings{DBLP:conf/fpl/ChengXHH06,
author = {Lerong Cheng and
Jinjun Xiong and
Lei He and
Mike Hutton},
title = {FPGA Performance Optimization Via Chipwise Placement Considering
Process Variations},
booktitle = {FPL},
year = {2006},
pages = {1-6},
ee = {http://doi.ieeecomputersociety.org/10.1109/FPL.2006.311193},
crossref = {DBLP:conf/fpl/2006},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/fpl/2006,
title = {Proceedings of the 2006 International Conference on Field
Programmable Logic and Applications (FPL), Madrid, Spain,
August 28-30, 2006},
booktitle = {FPL},
publisher = {IEEE},
year = {2006},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Copyright © 2007-07-19 by Michael Ley (ley@uni-trier.de)