BibTeX record conf/fpl/ChengXHH06

download as .bib file

@inproceedings{DBLP:conf/fpl/ChengXHH06,
  author       = {Lerong Cheng and
                  Jinjun Xiong and
                  Lei He and
                  Mike Hutton},
  title        = {{FPGA} Performance Optimization Via Chipwise Placement Considering
                  Process Variations},
  booktitle    = {Proceedings of the 2006 International Conference on Field Programmable
                  Logic and Applications (FPL), Madrid, Spain, August 28-30, 2006},
  pages        = {1--6},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/FPL.2006.311193},
  doi          = {10.1109/FPL.2006.311193},
  timestamp    = {Tue, 21 Mar 2023 21:01:23 +0100},
  biburl       = {https://dblp.org/rec/conf/fpl/ChengXHH06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.