BibTeX record conf/fpl/BartosF94

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@inproceedings{DBLP:conf/fpl/BartosF94,
  author    = {Tibor Bartos and
               Norbert Fristacky},
  title     = {Formal Verification of Timing Rules in Design Specifications},
  booktitle = {Field-Programmable Logic, Architectures, Synthesis and Applications,
               4th International Workshop on Field-Programmable Logic and Applications,
               {FPL} '94, Prague, Czech Republic, September 7-9, 1994, Proceedings},
  pages     = {117--119},
  year      = {1994},
  crossref  = {DBLP:conf/fpl/1994},
  url       = {https://doi.org/10.1007/3-540-58419-6_76},
  doi       = {10.1007/3-540-58419-6_76},
  timestamp = {Sat, 20 May 2017 15:32:53 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/fpl/BartosF94},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/fpl/1994,
  editor    = {Reiner W. Hartenstein and
               Michal Serv{\'{\i}}t},
  title     = {Field-Programmable Logic, Architectures, Synthesis and Applications,
               4th International Workshop on Field-Programmable Logic and Applications,
               {FPL} '94, Prague, Czech Republic, September 7-9, 1994, Proceedings},
  series    = {Lecture Notes in Computer Science},
  volume    = {849},
  publisher = {Springer},
  year      = {1994},
  url       = {https://doi.org/10.1007/3-540-58419-6},
  doi       = {10.1007/3-540-58419-6},
  isbn      = {3-540-58419-6},
  timestamp = {Sat, 20 May 2017 15:32:53 +0200},
  biburl    = {https://dblp.org/rec/bib/conf/fpl/1994},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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