Securing netlist-level FPGA design through exploiting process variation and degradation.

Jason Xin Zheng Miodrag Potkonjak Securing netlist-level FPGA design through exploiting process variation and degradation. 129-138 2012 FPGA http://doi.acm.org/10.1145/2145694.2145716 conf/fpga/2012 db/conf/fpga/fpga2012.html#ZhengP12