BibTeX
@inproceedings{DBLP:conf/fpga/YuCL08,
author = {Haile Yu and
Yuk Hei Chan and
Philip Heng Wai Leong},
title = {FPGA interconnect design using logical effort},
booktitle = {FPGA},
year = {2008},
pages = {257},
ee = {http://doi.acm.org/10.1145/1344671.1344710},
crossref = {DBLP:conf/fpga/2008},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/fpga/2008,
editor = {Mike Hutton and
Paul Chow},
title = {Proceedings of the ACM/SIGDA 16th International Symposium
on Field Programmable Gate Arrays, FPGA 2008, Monterey,
California, USA, February 24-26, 2008},
booktitle = {FPGA},
publisher = {ACM},
year = {2008},
isbn = {978-1-59593-934-0},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
Copyright © 2008-04-09 by Michael Ley (ley@uni-trier.de)