BibTeX record conf/fpga/XuLSL024

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@inproceedings{DBLP:conf/fpga/XuLSL024,
  author       = {Shaoxian Xu and
                  Sitong Lu and
                  Zhiyuan Shao and
                  Xiaofei Liao and
                  Hai Jin},
  editor       = {Zhiru Zhang and
                  Andrew Putnam},
  title        = {MiCache: An MSHR-inclusive Non-blocking Cache Design for FPGAs},
  booktitle    = {Proceedings of the 2024 {ACM/SIGDA} International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2024, Monterey, CA, USA, March 3-5,
                  2024},
  pages        = {22--32},
  publisher    = {{ACM}},
  year         = {2024},
  url          = {https://doi.org/10.1145/3626202.3637571},
  doi          = {10.1145/3626202.3637571},
  timestamp    = {Mon, 15 Apr 2024 08:25:20 +0200},
  biburl       = {https://dblp.org/rec/conf/fpga/XuLSL024.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}