![](https://dblp.uni-trier.de/img/logo.ua.320x120.png)
![](https://dblp.uni-trier.de/img/dropdown.dark.16x16.png)
![](https://dblp.uni-trier.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
![search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
default search action
BibTeX record conf/fpga/VenugopalS13
@inproceedings{DBLP:conf/fpga/VenugopalS13, author = {Vivek Venugopal and Devu Manikantan Shila}, editor = {Brad L. Hutchings and Vaughn Betz}, title = {Hardware acceleration of {TEA} and {XTEA} algorithms on FPGA, {GPU} and multi-core processors (abstract only)}, booktitle = {The 2013 {ACM/SIGDA} International Symposium on Field Programmable Gate Arrays, {FPGA} '13, Monterey, CA, USA, February 11-13, 2013}, pages = {270}, publisher = {{ACM}}, year = {2013}, url = {https://doi.org/10.1145/2435264.2435326}, doi = {10.1145/2435264.2435326}, timestamp = {Tue, 06 Nov 2018 16:58:22 +0100}, biburl = {https://dblp.org/rec/conf/fpga/VenugopalS13.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
![](https://dblp.uni-trier.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.