BibTeX record conf/fpga/SudaCDMMVSC16

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@inproceedings{DBLP:conf/fpga/SudaCDMMVSC16,
  author       = {Naveen Suda and
                  Vikas Chandra and
                  Ganesh Dasika and
                  Abinash Mohanty and
                  Yufei Ma and
                  Sarma B. K. Vrudhula and
                  Jae{-}sun Seo and
                  Yu Cao},
  editor       = {Deming Chen and
                  Jonathan W. Greene},
  title        = {Throughput-Optimized OpenCL-based {FPGA} Accelerator for Large-Scale
                  Convolutional Neural Networks},
  booktitle    = {Proceedings of the 2016 {ACM/SIGDA} International Symposium on Field-Programmable
                  Gate Arrays, Monterey, CA, USA, February 21-23, 2016},
  pages        = {16--25},
  publisher    = {{ACM}},
  year         = {2016},
  url          = {https://doi.org/10.1145/2847263.2847276},
  doi          = {10.1145/2847263.2847276},
  timestamp    = {Tue, 16 Aug 2022 15:44:25 +0200},
  biburl       = {https://dblp.org/rec/conf/fpga/SudaCDMMVSC16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}