A novel methodology for designing high-performance and low-energy FPGA routing architecture.

K. Siozios Konstantinos Tatas Dimitrios Soudris Antonios Thanailakis A novel methodology for designing high-performance and low-energy FPGA routing architecture. 224 2006 conf/fpga/2006 FPGA http://doi.acm.org/10.1145/1117201.1117236 db/conf/fpga/fpga2006.html#SioziosTST06