Timing verification of dynamically reconfigurable logic for the xilinx virtex FPGA series.

Ian Robertson James Irvine Patrick Lysaght David Robinson Timing verification of dynamically reconfigurable logic for the xilinx virtex FPGA series. 127-135 2002 FPGA http://doi.acm.org/10.1145/503048.503068 db/conf/fpga/fpga2002.html#RobertsonILR02