<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/fpga/LewisABBBCGHLLLMMPPPRRSSYCR05" mdate="2006-02-13">
<author>David M. Lewis</author>
<author>Elias Ahmed</author>
<author>Gregg Baeckler</author>
<author>Vaughn Betz</author>
<author>Mark Bourgeault</author>
<author>David Cashman</author>
<author>David R. Galloway</author>
<author>Mike Hutton</author>
<author>Christopher Lane</author>
<author>Andy Lee</author>
<author>Paul Leventis</author>
<author>Sandy Marquardt</author>
<author>Cameron McClintock</author>
<author>Ketan Padalia</author>
<author>Bruce Pedersen</author>
<author>Giles Powell</author>
<author>Boris Ratchev</author>
<author>Srinivas Reddy</author>
<author>Jay Schleicher</author>
<author>Kevin Stevens</author>
<author>Richard Yuan</author>
<author>Richard Cliff</author>
<author>Jonathan Rose</author>
<title>The Stratix II logic and routing architecture.</title>
<pages>14-20</pages>
<year>2005</year>
<crossref>conf/fpga/2005</crossref>
<booktitle>FPGA</booktitle>
<ee>http://doi.acm.org/10.1145/1046192.1046195</ee>
<url>db/conf/fpga/fpga2005.html#LewisABBBCGHLLLMMPPPRRSSYCR05</url>
</inproceedings>
</dblp>
