<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/fpga/HuttonCKMNPPPSS02" mdate="2006-02-13">
<author>Michael Hutton</author>
<author>Vinson Chan</author>
<author>Peter Kazarian</author>
<author>Victor Maruri</author>
<author>Tony Ngai</author>
<author>Jim Park</author>
<author>Rakesh Patel</author>
<author>Bruce Pedersen</author>
<author>Jay Schleicher</author>
<author>Sergey Shumarayev</author>
<title>Interconnect enhancements for a high-speed PLD architecture.</title>
<pages>3-10</pages>
<year>2002</year>
<booktitle>FPGA</booktitle>
<ee>http://doi.acm.org/10.1145/503048.503050</ee>
<url>db/conf/fpga/fpga2002.html#HuttonCKMNPPPSS02</url>
</inproceedings>
</dblp>
