![](https://dblp.uni-trier.de/img/logo.ua.320x120.png)
![](https://dblp.uni-trier.de/img/dropdown.dark.16x16.png)
![](https://dblp.uni-trier.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
![search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
default search action
BibTeX record conf/fpga/FosterH10
@inproceedings{DBLP:conf/fpga/FosterH10, author = {David L. Foster and Darrin M. Hanna}, editor = {Peter Y. K. Cheung and John Wawrzynek}, title = {Maximizing area-constrained partial fault tolerance in reconfigurable logic}, booktitle = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA, February 21-23, 2010}, pages = {259--262}, publisher = {{ACM}}, year = {2010}, url = {https://doi.org/10.1145/1723112.1723155}, doi = {10.1145/1723112.1723155}, timestamp = {Sun, 04 Aug 2024 19:43:51 +0200}, biburl = {https://dblp.org/rec/conf/fpga/FosterH10.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
![](https://dblp.uni-trier.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.